acid-drop- Hacking the planet from a LilyGo T-Deck using custom firmware |
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es7210.cpp (19676B)
1 /* 2 * ESPRESSIF MIT License 3 * 4 * Copyright (c) 2021 <ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD> 5 * 6 * Permission is hereby granted for use on all ESPRESSIF SYSTEMS products, in which case, 7 * it is free of charge, to any person obtaining a copy of this software and associated 8 * documentation files (the "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the Software is furnished 11 * to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all copies or 14 * substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #ifdef ESP32 26 27 #include <Wire.h> 28 #include <string.h> 29 #include "esp_log.h" 30 #include "es7210.h" 31 32 33 #define I2S_DSP_MODE_A 0 34 #define MCLK_DIV_FRE 256 35 36 37 #define ES7210_MCLK_SOURCE FROM_CLOCK_DOUBLE_PIN /* In master mode, 0 : MCLK from pad 1 : MCLK from clock doubler */ 38 #define FROM_PAD_PIN 0 39 #define FROM_CLOCK_DOUBLE_PIN 1 40 41 42 static TwoWire *es7210wire; 43 static es7210_gain_value_t gain; 44 45 /* 46 * Clock coefficient structer 47 */ 48 struct _coeff_div_es7210 { 49 uint32_t mclk; /* mclk frequency */ 50 uint32_t lrck; /* lrck */ 51 uint8_t ss_ds; 52 uint8_t adc_div; /* adcclk divider */ 53 uint8_t dll; /* dll_bypass */ 54 uint8_t doubler; /* doubler enable */ 55 uint8_t osr; /* adc osr */ 56 uint8_t mclk_src; /* select mclk source */ 57 uint32_t lrck_h; /* The high 4 bits of lrck */ 58 uint32_t lrck_l; /* The low 8 bits of lrck */ 59 }; 60 61 static const char *TAG = "ES7210"; 62 63 static es7210_input_mics_t mic_select = (es7210_input_mics_t)(ES7210_INPUT_MIC1 | ES7210_INPUT_MIC2 | ES7210_INPUT_MIC3 | ES7210_INPUT_MIC4); 64 65 /* Codec hifi mclk clock divider coefficients 66 * MEMBER REG 67 * mclk: 0x03 68 * lrck: standard 69 * ss_ds: -- 70 * adc_div: 0x02 71 * dll: 0x06 72 * doubler: 0x02 73 * osr: 0x07 74 * mclk_src: 0x03 75 * lrckh: 0x04 76 * lrckl: 0x05 77 */ 78 static const struct _coeff_div_es7210 coeff_div[] = { 79 //mclk lrck ss_ds adc_div dll doubler osr mclk_src lrckh lrckl 80 /* 8k */ 81 {12288000, 8000 , 0x00, 0x03, 0x01, 0x00, 0x20, 0x00, 0x06, 0x00}, 82 {16384000, 8000 , 0x00, 0x04, 0x01, 0x00, 0x20, 0x00, 0x08, 0x00}, 83 {19200000, 8000 , 0x00, 0x1e, 0x00, 0x01, 0x28, 0x00, 0x09, 0x60}, 84 {4096000, 8000 , 0x00, 0x01, 0x01, 0x00, 0x20, 0x00, 0x02, 0x00}, 85 86 /* 11.025k */ 87 {11289600, 11025, 0x00, 0x02, 0x01, 0x00, 0x20, 0x00, 0x01, 0x00}, 88 89 /* 12k */ 90 {12288000, 12000, 0x00, 0x02, 0x01, 0x00, 0x20, 0x00, 0x04, 0x00}, 91 {19200000, 12000, 0x00, 0x14, 0x00, 0x01, 0x28, 0x00, 0x06, 0x40}, 92 93 /* 16k */ 94 {4096000, 16000, 0x00, 0x01, 0x01, 0x01, 0x20, 0x00, 0x01, 0x00}, 95 {19200000, 16000, 0x00, 0x0a, 0x00, 0x00, 0x1e, 0x00, 0x04, 0x80}, 96 {16384000, 16000, 0x00, 0x02, 0x01, 0x00, 0x20, 0x00, 0x04, 0x00}, 97 {12288000, 16000, 0x00, 0x03, 0x01, 0x01, 0x20, 0x00, 0x03, 0x00}, 98 99 /* 22.05k */ 100 {11289600, 22050, 0x00, 0x01, 0x01, 0x00, 0x20, 0x00, 0x02, 0x00}, 101 102 /* 24k */ 103 {12288000, 24000, 0x00, 0x01, 0x01, 0x00, 0x20, 0x00, 0x02, 0x00}, 104 {19200000, 24000, 0x00, 0x0a, 0x00, 0x01, 0x28, 0x00, 0x03, 0x20}, 105 106 /* 32k */ 107 {12288000, 32000, 0x00, 0x03, 0x00, 0x00, 0x20, 0x00, 0x01, 0x80}, 108 {16384000, 32000, 0x00, 0x01, 0x01, 0x00, 0x20, 0x00, 0x02, 0x00}, 109 {19200000, 32000, 0x00, 0x05, 0x00, 0x00, 0x1e, 0x00, 0x02, 0x58}, 110 111 /* 44.1k */ 112 {11289600, 44100, 0x00, 0x01, 0x01, 0x01, 0x20, 0x00, 0x01, 0x00}, 113 114 /* 48k */ 115 {12288000, 48000, 0x00, 0x01, 0x01, 0x01, 0x20, 0x00, 0x01, 0x00}, 116 {19200000, 48000, 0x00, 0x05, 0x00, 0x01, 0x28, 0x00, 0x01, 0x90}, 117 118 /* 64k */ 119 {16384000, 64000, 0x01, 0x01, 0x01, 0x00, 0x20, 0x00, 0x01, 0x00}, 120 {19200000, 64000, 0x00, 0x05, 0x00, 0x01, 0x1e, 0x00, 0x01, 0x2c}, 121 122 /* 88.2k */ 123 {11289600, 88200, 0x01, 0x01, 0x01, 0x01, 0x20, 0x00, 0x00, 0x80}, 124 125 /* 96k */ 126 {12288000, 96000, 0x01, 0x01, 0x01, 0x01, 0x20, 0x00, 0x00, 0x80}, 127 {19200000, 96000, 0x01, 0x05, 0x00, 0x01, 0x28, 0x00, 0x00, 0xc8}, 128 }; 129 130 static esp_err_t es7210_write_reg(uint8_t reg_addr, uint8_t data) 131 { 132 133 es7210wire->beginTransmission(ES7210_ADDR); 134 es7210wire->write(reg_addr); 135 es7210wire->write(data); 136 return es7210wire->endTransmission(); 137 138 } 139 140 static esp_err_t es7210_update_reg_bit(uint8_t reg_addr, uint8_t update_bits, uint8_t data) 141 { 142 uint8_t regv; 143 regv = es7210_read_reg(reg_addr); 144 regv = (regv & (~update_bits)) | (update_bits & data); 145 return es7210_write_reg(reg_addr, regv); 146 } 147 148 static int get_coeff(uint32_t mclk, uint32_t lrck) 149 { 150 for (int i = 0; i < (sizeof(coeff_div) / sizeof(coeff_div[0])); i++) { 151 if (coeff_div[i].lrck == lrck && coeff_div[i].mclk == mclk) 152 return i; 153 } 154 return -1; 155 } 156 157 int8_t get_es7210_mclk_src(void) 158 { 159 return ES7210_MCLK_SOURCE; 160 } 161 162 int es7210_read_reg(uint8_t reg_addr) 163 { 164 uint8_t data; 165 es7210wire->beginTransmission(ES7210_ADDR); 166 es7210wire->write(reg_addr); 167 es7210wire->endTransmission(false); 168 es7210wire->requestFrom(ES7210_ADDR, (size_t)1); 169 data = es7210wire->read(); 170 return (int)data; 171 } 172 173 esp_err_t es7210_config_sample(audio_hal_iface_samples_t sample) 174 { 175 uint8_t regv; 176 int coeff; 177 int sample_fre = 0; 178 int mclk_fre = 0; 179 esp_err_t ret = ESP_OK; 180 switch (sample) { 181 case AUDIO_HAL_08K_SAMPLES: 182 sample_fre = 8000; 183 break; 184 case AUDIO_HAL_11K_SAMPLES: 185 sample_fre = 11025; 186 break; 187 case AUDIO_HAL_16K_SAMPLES: 188 sample_fre = 16000; 189 break; 190 case AUDIO_HAL_22K_SAMPLES: 191 sample_fre = 22050; 192 break; 193 case AUDIO_HAL_24K_SAMPLES: 194 sample_fre = 24000; 195 break; 196 case AUDIO_HAL_32K_SAMPLES: 197 sample_fre = 32000; 198 break; 199 case AUDIO_HAL_44K_SAMPLES: 200 sample_fre = 44100; 201 break; 202 case AUDIO_HAL_48K_SAMPLES: 203 sample_fre = 48000; 204 break; 205 default: 206 ESP_LOGE(TAG, "Unable to configure sample rate %dHz", sample_fre); 207 break; 208 } 209 mclk_fre = sample_fre * MCLK_DIV_FRE; 210 coeff = get_coeff(mclk_fre, sample_fre); 211 if (coeff < 0) { 212 ESP_LOGE(TAG, "Unable to configure sample rate %dHz with %dHz MCLK", sample_fre, mclk_fre); 213 return ESP_FAIL; 214 } 215 /* Set clock parammeters */ 216 if (coeff >= 0) { 217 /* Set adc_div & doubler & dll */ 218 regv = es7210_read_reg(ES7210_MAINCLK_REG02) & 0x00; 219 regv |= coeff_div[coeff].adc_div; 220 regv |= coeff_div[coeff].doubler << 6; 221 regv |= coeff_div[coeff].dll << 7; 222 ret |= es7210_write_reg(ES7210_MAINCLK_REG02, regv); 223 /* Set osr */ 224 regv = coeff_div[coeff].osr; 225 ret |= es7210_write_reg(ES7210_OSR_REG07, regv); 226 /* Set lrck */ 227 regv = coeff_div[coeff].lrck_h; 228 ret |= es7210_write_reg(ES7210_LRCK_DIVH_REG04, regv); 229 regv = coeff_div[coeff].lrck_l; 230 ret |= es7210_write_reg(ES7210_LRCK_DIVL_REG05, regv); 231 } 232 return ret; 233 } 234 235 esp_err_t es7210_mic_select(es7210_input_mics_t mic) 236 { 237 esp_err_t ret = ESP_OK; 238 mic_select = mic; 239 if (mic_select & (ES7210_INPUT_MIC1 | ES7210_INPUT_MIC2 | ES7210_INPUT_MIC3 | ES7210_INPUT_MIC4)) { 240 for (int i = 0; i < 4; i++) { 241 ret |= es7210_update_reg_bit(ES7210_MIC1_GAIN_REG43 + i, 0x10, 0x00); 242 } 243 ret |= es7210_write_reg(ES7210_MIC12_POWER_REG4B, 0xff); 244 ret |= es7210_write_reg(ES7210_MIC34_POWER_REG4C, 0xff); 245 if (mic_select & ES7210_INPUT_MIC1) { 246 ESP_LOGI(TAG, "Enable ES7210_INPUT_MIC1"); 247 ret |= es7210_update_reg_bit(ES7210_CLOCK_OFF_REG01, 0x0b, 0x00); 248 ret |= es7210_write_reg(ES7210_MIC12_POWER_REG4B, 0x00); 249 ret |= es7210_update_reg_bit(ES7210_MIC1_GAIN_REG43, 0x10, 0x10); 250 } 251 if (mic_select & ES7210_INPUT_MIC2) { 252 ESP_LOGI(TAG, "Enable ES7210_INPUT_MIC2"); 253 ret |= es7210_update_reg_bit(ES7210_CLOCK_OFF_REG01, 0x0b, 0x00); 254 ret |= es7210_write_reg(ES7210_MIC12_POWER_REG4B, 0x00); 255 ret |= es7210_update_reg_bit(ES7210_MIC2_GAIN_REG44, 0x10, 0x10); 256 } 257 if (mic_select & ES7210_INPUT_MIC3) { 258 ESP_LOGI(TAG, "Enable ES7210_INPUT_MIC3"); 259 ret |= es7210_update_reg_bit(ES7210_CLOCK_OFF_REG01, 0x15, 0x00); 260 ret |= es7210_write_reg(ES7210_MIC34_POWER_REG4C, 0x00); 261 ret |= es7210_update_reg_bit(ES7210_MIC3_GAIN_REG45, 0x10, 0x10); 262 } 263 if (mic_select & ES7210_INPUT_MIC4) { 264 ESP_LOGI(TAG, "Enable ES7210_INPUT_MIC4"); 265 ret |= es7210_update_reg_bit(ES7210_CLOCK_OFF_REG01, 0x15, 0x00); 266 ret |= es7210_write_reg(ES7210_MIC34_POWER_REG4C, 0x00); 267 ret |= es7210_update_reg_bit(ES7210_MIC4_GAIN_REG46, 0x10, 0x10); 268 } 269 } else { 270 ESP_LOGE(TAG, "Microphone selection error"); 271 return ESP_FAIL; 272 } 273 return ret; 274 } 275 276 esp_err_t es7210_adc_init(TwoWire *tw, audio_hal_codec_config_t *codec_cfg) 277 { 278 esp_err_t ret = ESP_OK; 279 280 es7210wire = tw; 281 282 ret |= es7210_write_reg(ES7210_RESET_REG00, 0xff); 283 ret |= es7210_write_reg(ES7210_RESET_REG00, 0x41); 284 ret |= es7210_write_reg(ES7210_CLOCK_OFF_REG01, 0x1f); 285 ret |= es7210_write_reg(ES7210_TIME_CONTROL0_REG09, 0x30); /* Set chip state cycle */ 286 ret |= es7210_write_reg(ES7210_TIME_CONTROL1_REG0A, 0x30); /* Set power on state cycle */ 287 // ret |= es7210_write_reg(ES7210_ADC12_HPF2_REG23, 0x2a); /* Quick setup */ 288 // ret |= es7210_write_reg(ES7210_ADC12_HPF1_REG22, 0x0a); 289 // ret |= es7210_write_reg(ES7210_ADC34_HPF2_REG20, 0x0a); 290 // ret |= es7210_write_reg(ES7210_ADC34_HPF1_REG21, 0x2a); 291 /* Set master/slave audio interface */ 292 audio_hal_codec_i2s_iface_t *i2s_cfg = & (codec_cfg->i2s_iface); 293 switch (i2s_cfg->mode) { 294 case AUDIO_HAL_MODE_MASTER: /* MASTER MODE */ 295 ESP_LOGI(TAG, "ES7210 in Master mode"); 296 // ret |= es7210_update_reg_bit(ES7210_MODE_CONFIG_REG08, 0x01, 0x01); 297 ret |= es7210_write_reg(ES7210_MODE_CONFIG_REG08, 0x20); 298 /* Select clock source for internal mclk */ 299 switch (get_es7210_mclk_src()) { 300 case FROM_PAD_PIN: 301 ret |= es7210_update_reg_bit(ES7210_MASTER_CLK_REG03, 0x80, 0x00); 302 break; 303 case FROM_CLOCK_DOUBLE_PIN: 304 ret |= es7210_update_reg_bit(ES7210_MASTER_CLK_REG03, 0x80, 0x80); 305 break; 306 default: 307 ret |= es7210_update_reg_bit(ES7210_MASTER_CLK_REG03, 0x80, 0x00); 308 break; 309 } 310 break; 311 case AUDIO_HAL_MODE_SLAVE: /* SLAVE MODE */ 312 ESP_LOGI(TAG, "ES7210 in Slave mode"); 313 break; 314 default: 315 break; 316 } 317 ret |= es7210_write_reg(ES7210_ANALOG_REG40, 0xC3); /* Select power off analog, vdda = 3.3V, close vx20ff, VMID select 5KΩ start */ 318 ret |= es7210_write_reg(ES7210_MIC12_BIAS_REG41, 0x70); /* Select 2.87v */ 319 ret |= es7210_write_reg(ES7210_MIC34_BIAS_REG42, 0x70); /* Select 2.87v */ 320 ret |= es7210_write_reg(ES7210_OSR_REG07, 0x20); 321 ret |= es7210_write_reg(ES7210_MAINCLK_REG02, 0xc1); /* Set the frequency division coefficient and use dll except clock doubler, and need to set 0xc1 to clear the state */ 322 ret |= es7210_config_sample(i2s_cfg->samples); 323 ret |= es7210_mic_select(mic_select); 324 ret |= es7210_adc_set_gain_all(GAIN_0DB); 325 return ESP_OK; 326 } 327 328 esp_err_t es7210_adc_deinit() 329 { 330 return ESP_OK; 331 } 332 333 esp_err_t es7210_config_fmt(audio_hal_iface_format_t fmt) 334 { 335 esp_err_t ret = ESP_OK; 336 uint8_t adc_iface = 0; 337 adc_iface = es7210_read_reg(ES7210_SDP_INTERFACE1_REG11); 338 adc_iface &= 0xfc; 339 switch (fmt) { 340 case AUDIO_HAL_I2S_NORMAL: 341 ESP_LOGD(TAG, "ES7210 in I2S Format"); 342 adc_iface |= 0x00; 343 break; 344 case AUDIO_HAL_I2S_LEFT: 345 case AUDIO_HAL_I2S_RIGHT: 346 ESP_LOGD(TAG, "ES7210 in LJ Format"); 347 adc_iface |= 0x01; 348 break; 349 case AUDIO_HAL_I2S_DSP: 350 if (I2S_DSP_MODE_A) { 351 ESP_LOGD(TAG, "ES7210 in DSP-A Format"); 352 adc_iface |= 0x03; 353 } else { 354 ESP_LOGD(TAG, "ES7210 in DSP-B Format"); 355 adc_iface |= 0x13; 356 } 357 break; 358 default: 359 adc_iface &= 0xfc; 360 break; 361 } 362 ret |= es7210_write_reg(ES7210_SDP_INTERFACE1_REG11, adc_iface); 363 /* Force ADC1/2 output to SDOUT1 and ADC3/4 output to SDOUT2 */ 364 ret |= es7210_write_reg(ES7210_SDP_INTERFACE2_REG12, 0x00); 365 return ret; 366 } 367 368 esp_err_t es7210_set_bits(audio_hal_iface_bits_t bits) 369 { 370 esp_err_t ret = ESP_OK; 371 uint8_t adc_iface = 0; 372 adc_iface = es7210_read_reg(ES7210_SDP_INTERFACE1_REG11); 373 adc_iface &= 0x1f; 374 switch (bits) { 375 case AUDIO_HAL_BIT_LENGTH_16BITS: 376 adc_iface |= 0x60; 377 break; 378 case AUDIO_HAL_BIT_LENGTH_24BITS: 379 adc_iface |= 0x00; 380 break; 381 case AUDIO_HAL_BIT_LENGTH_32BITS: 382 adc_iface |= 0x80; 383 break; 384 default: 385 adc_iface |= 0x60; 386 break; 387 } 388 ret |= es7210_write_reg(ES7210_SDP_INTERFACE1_REG11, adc_iface); 389 return ret; 390 } 391 392 esp_err_t es7210_adc_config_i2s(audio_hal_codec_mode_t mode, audio_hal_codec_i2s_iface_t *iface) 393 { 394 esp_err_t ret = ESP_OK; 395 ret |= es7210_set_bits(iface->bits); 396 ret |= es7210_config_fmt(iface->fmt); 397 ret |= es7210_config_sample(iface->samples); 398 return ret; 399 } 400 401 esp_err_t es7210_start(uint8_t clock_reg_value) 402 { 403 esp_err_t ret = ESP_OK; 404 ret |= es7210_write_reg(ES7210_CLOCK_OFF_REG01, clock_reg_value); 405 ret |= es7210_write_reg(ES7210_POWER_DOWN_REG06, 0x00); 406 // ret |= es7210_write_reg(ES7210_ANALOG_REG40, 0x40); 407 ret |= es7210_write_reg(ES7210_MIC1_POWER_REG47, 0x00); 408 ret |= es7210_write_reg(ES7210_MIC2_POWER_REG48, 0x00); 409 ret |= es7210_write_reg(ES7210_MIC3_POWER_REG49, 0x00); 410 ret |= es7210_write_reg(ES7210_MIC4_POWER_REG4A, 0x00); 411 ret |= es7210_mic_select(mic_select); 412 return ret; 413 } 414 415 esp_err_t es7210_stop(void) 416 { 417 esp_err_t ret = ESP_OK; 418 ret |= es7210_write_reg(ES7210_MIC1_POWER_REG47, 0xff); 419 ret |= es7210_write_reg(ES7210_MIC2_POWER_REG48, 0xff); 420 ret |= es7210_write_reg(ES7210_MIC3_POWER_REG49, 0xff); 421 ret |= es7210_write_reg(ES7210_MIC4_POWER_REG4A, 0xff); 422 ret |= es7210_write_reg(ES7210_MIC12_POWER_REG4B,0xff); 423 ret |= es7210_write_reg(ES7210_MIC34_POWER_REG4C, 0xff); 424 // ret |= es7210_write_reg(ES7210_ANALOG_REG40, 0xc0); 425 ret |= es7210_write_reg(ES7210_CLOCK_OFF_REG01, 0x7f); 426 ret |= es7210_write_reg(ES7210_POWER_DOWN_REG06, 0x07); 427 return ret; 428 } 429 430 esp_err_t es7210_adc_ctrl_state(audio_hal_codec_mode_t mode, audio_hal_ctrl_t ctrl_state) 431 { 432 static uint8_t regv; 433 esp_err_t ret = ESP_OK; 434 // ESP_LOGW(TAG, "ES7210 only supports ADC mode"); 435 ret = es7210_read_reg(ES7210_CLOCK_OFF_REG01); 436 if ((ret != 0x7f) && (ret != 0xff)) { 437 regv = es7210_read_reg(ES7210_CLOCK_OFF_REG01); 438 } 439 if (ctrl_state == AUDIO_HAL_CTRL_START) { 440 ESP_LOGI(TAG, "The ES7210_CLOCK_OFF_REG01 value before stop is %x",regv); 441 ret |= es7210_start(regv); 442 } else { 443 ESP_LOGW(TAG, "The codec is about to stop"); 444 regv = es7210_read_reg(ES7210_CLOCK_OFF_REG01); 445 ret |= es7210_stop(); 446 } 447 return ESP_OK; 448 } 449 450 esp_err_t es7210_adc_set_gain(es7210_input_mics_t mic_mask, es7210_gain_value_t gain) 451 { 452 esp_err_t ret_val = ESP_OK; 453 454 if (gain < GAIN_0DB) { 455 gain = GAIN_0DB; 456 } 457 458 if (gain > GAIN_37_5DB) { 459 gain = GAIN_37_5DB; 460 } 461 462 if (mic_mask & ES7210_INPUT_MIC1) { 463 ret_val |= es7210_update_reg_bit(ES7210_MIC1_GAIN_REG43, 0x0f, gain); 464 } 465 if (mic_mask & ES7210_INPUT_MIC2) { 466 ret_val |= es7210_update_reg_bit(ES7210_MIC2_GAIN_REG44, 0x0f, gain); 467 } 468 if (mic_mask & ES7210_INPUT_MIC3) { 469 ret_val |= es7210_update_reg_bit(ES7210_MIC3_GAIN_REG45, 0x0f, gain); 470 } 471 if (mic_mask & ES7210_INPUT_MIC4) { 472 ret_val |= es7210_update_reg_bit(ES7210_MIC4_GAIN_REG46, 0x0f, gain); 473 } 474 475 return ret_val; 476 } 477 478 esp_err_t es7210_adc_set_gain_all(es7210_gain_value_t gain) 479 { 480 esp_err_t ret = ESP_OK; 481 uint32_t max_gain_vaule = 14; 482 if (gain < 0) { 483 gain = (es7210_gain_value_t) 0; 484 } else if (gain > max_gain_vaule) { 485 gain = (es7210_gain_value_t) max_gain_vaule; 486 } 487 ESP_LOGD(TAG, "SET: gain:%d", gain); 488 if (mic_select & ES7210_INPUT_MIC1) { 489 ret |= es7210_update_reg_bit(ES7210_MIC1_GAIN_REG43, 0x0f, gain); 490 } 491 if (mic_select & ES7210_INPUT_MIC2) { 492 ret |= es7210_update_reg_bit(ES7210_MIC2_GAIN_REG44, 0x0f, gain); 493 } 494 if (mic_select & ES7210_INPUT_MIC3) { 495 ret |= es7210_update_reg_bit(ES7210_MIC3_GAIN_REG45, 0x0f, gain); 496 } 497 if (mic_select & ES7210_INPUT_MIC4) { 498 ret |= es7210_update_reg_bit(ES7210_MIC4_GAIN_REG46, 0x0f, gain); 499 } 500 return ret; 501 } 502 503 esp_err_t es7210_adc_get_gain(es7210_input_mics_t mic_mask, es7210_gain_value_t *gain) 504 { 505 int regv = 0; 506 uint8_t gain_value; 507 if (mic_mask & ES7210_INPUT_MIC1) { 508 regv = es7210_read_reg(ES7210_MIC1_GAIN_REG43); 509 } else if (mic_mask & ES7210_INPUT_MIC2) { 510 regv = es7210_read_reg(ES7210_MIC2_GAIN_REG44); 511 } else if (mic_mask & ES7210_INPUT_MIC3) { 512 regv = es7210_read_reg(ES7210_MIC3_GAIN_REG45); 513 } else if (mic_mask & ES7210_INPUT_MIC4) { 514 regv = es7210_read_reg(ES7210_MIC4_GAIN_REG46); 515 } else { 516 ESP_LOGE(TAG, "No MIC selected"); 517 return ESP_FAIL; 518 } 519 if (regv == ESP_FAIL) { 520 return regv; 521 } 522 gain_value = (regv & 0x0f); /* Retain the last four bits for gain */ 523 *gain = (es7210_gain_value_t) gain_value; 524 ESP_LOGI(TAG, "GET: gain_value:%d", gain_value); 525 return ESP_OK; 526 } 527 528 esp_err_t es7210_adc_set_volume(int volume) 529 { 530 esp_err_t ret = ESP_OK; 531 ESP_LOGD(TAG, "ADC can adjust gain"); 532 return ret; 533 } 534 535 esp_err_t es7210_set_mute(bool enable) 536 { 537 ESP_LOGD(TAG, "ES7210 SetMute :%d", enable); 538 return ESP_OK; 539 } 540 541 void es7210_read_all(void) 542 { 543 for (int i = 0; i <= 0x4E; i++) { 544 uint8_t reg = es7210_read_reg(i); 545 ets_printf("REG:%02x, %02x\n", reg, i); 546 } 547 } 548 549 #endif