acid-drop

- Hacking the planet from a LilyGo T-Deck using custom firmware
git clone git://git.acid.vegas/acid-drop.git
SSD1963_Init.h (9025B)
      1 #if defined (SSD1963_480_DRIVER)
      2 
      3   writecommand(0xE2);   //PLL multiplier, set PLL clock to 120M
      4   writedata(0x23);      //N=0x36 for 6.5M, 0x23 for 10M crystal
      5   writedata(0x02);
      6   writedata(0x54);
      7   writecommand(0xE0);   // PLL enable
      8   writedata(0x01);
      9 
     10   delay(10);
     11 
     12   writecommand(0xE0);
     13   writedata(0x03);
     14 
     15   delay(10);
     16 
     17   writecommand(0x01);   // software reset
     18 
     19   delay(100);
     20 
     21   writecommand(0xE6);   //PLL setting for PCLK, depends on resolution
     22   writedata(0x01);
     23   writedata(0x1F);
     24   writedata(0xFF);
     25 
     26   writecommand(0xB0);   //LCD SPECIFICATION
     27   writedata(0x20);
     28   writedata(0x00);
     29   writedata(0x01);    //Set HDP 479
     30   writedata(0xDF);
     31   writedata(0x01);    //Set VDP 271
     32   writedata(0x0F);
     33   writedata(0x00);
     34 
     35   writecommand(0xB4);   //HSYNC
     36   writedata(0x02);    //Set HT  531
     37   writedata(0x13);
     38   writedata(0x00);    //Set HPS 8
     39   writedata(0x08);
     40   writedata(0x2B);    //Set HPW 43
     41   writedata(0x00);    //Set LPS 2
     42   writedata(0x02);
     43   writedata(0x00);
     44 
     45   writecommand(0xB6);   //VSYNC
     46   writedata(0x01);    //Set VT  288
     47   writedata(0x20);
     48   writedata(0x00);    //Set VPS 4
     49   writedata(0x04);
     50   writedata(0x0c);    //Set VPW 12
     51   writedata(0x00);    //Set FPS 2
     52   writedata(0x02);
     53 
     54   writecommand(0xBA);
     55   writedata(0x0F);    //GPIO[3:0] out 1
     56 
     57   writecommand(0xB8);
     58   writedata(0x07);      //GPIO3=input, GPIO[2:0]=output
     59   writedata(0x01);    //GPIO0 normal
     60 
     61   writecommand(0x36);   //rotation
     62   writedata(0x21 | TFT_MAD_COLOR_ORDER);
     63 
     64   writecommand(0xF0);   //pixel data interface
     65   writedata(0x00);      //8 bit bus
     66 
     67   delay(1);
     68 
     69   writecommand(0xB8);
     70   writedata(0x0f);    //GPIO is controlled by host GPIO[3:0]=output   GPIO[0]=1  LCD ON  GPIO[0]=1  LCD OFF 
     71   writedata(0x01);    //GPIO0 normal
     72 
     73   writecommand(0xBA);
     74   writedata(0x01);    //GPIO[0] out 1 --- LCD display on/off control PIN
     75 
     76   writecommand(0x2A); 
     77   writedata(0);
     78   writedata(0);
     79   writedata((271 & 0xFF00)>>8);
     80   writedata(271 & 0xFF);
     81 
     82   writecommand(0x2B); 
     83   writedata(0);
     84   writedata(0);
     85   writedata((479 & 0xFF00)>>8);
     86   writedata(479 & 0xFF);
     87 
     88   writecommand(0x2C);
     89 
     90   writecommand(0x29);   //display on
     91 
     92   writecommand(0xBE);   //set PWM for B/L
     93   writedata(0x06);
     94   writedata(0xf0);
     95   writedata(0x01);
     96   writedata(0xf0);
     97   writedata(0x00);
     98   writedata(0x00);
     99 
    100   writecommand(0xd0); 
    101   writedata(0x0d);  
    102 
    103   writecommand(0x2C); 
    104 
    105 #elif defined (SSD1963_800_DRIVER)
    106 
    107   writecommand(0xE2);   //PLL multiplier, set PLL clock to 120M
    108   writedata(0x1E);      //N=0x36 for 6.5M, 0x23 for 10M crystal
    109   writedata(0x02);
    110   writedata(0x54);
    111   writecommand(0xE0);   // PLL enable
    112   writedata(0x01);
    113 
    114   delay(10);
    115 
    116   writecommand(0xE0);
    117   writedata(0x03);
    118 
    119   delay(10);
    120 
    121   writecommand(0x01);   // software reset
    122 
    123   delay(100);
    124 
    125   writecommand(0xE6);   //PLL setting for PCLK, depends on resolution
    126   writedata(0x03);
    127   writedata(0xFF);
    128   writedata(0xFF);
    129 
    130   writecommand(0xB0);   //LCD SPECIFICATION
    131   writedata(0x20);
    132   writedata(0x00);
    133   writedata(0x03);    //Set HDP 799
    134   writedata(0x1F);
    135   writedata(0x01);    //Set VDP 479
    136   writedata(0xDF);
    137   writedata(0x00);
    138 
    139   writecommand(0xB4);   //HSYNC
    140   writedata(0x03);    //Set HT  928
    141   writedata(0xA0);
    142   writedata(0x00);    //Set HPS 46
    143   writedata(0x2E);
    144   writedata(0x30);    //Set HPW 48
    145   writedata(0x00);    //Set LPS 15
    146   writedata(0x0F);
    147   writedata(0x00);
    148 
    149   writecommand(0xB6);   //VSYNC
    150   writedata(0x02);    //Set VT  525
    151   writedata(0x0D);
    152   writedata(0x00);    //Set VPS 16
    153   writedata(0x10);
    154   writedata(0x10);    //Set VPW 16
    155   writedata(0x00);    //Set FPS 8
    156   writedata(0x08);
    157 
    158   writecommand(0xBA);
    159   writedata(0x0F);    //GPIO[3:0] out 1
    160 
    161   writecommand(0xB8);
    162   writedata(0x07);      //GPIO3=input, GPIO[2:0]=output
    163   writedata(0x01);    //GPIO0 normal
    164 
    165   writecommand(0x36);   //rotation
    166   writedata(0x21 | TFT_MAD_COLOR_ORDER);
    167 
    168   writecommand(0xF0);   //pixel data interface
    169   writedata(0x00);      //8 bit bus
    170 
    171   delay(1);
    172 
    173   writecommand(0xB8);
    174   writedata(0x0f);    //GPIO is controlled by host GPIO[3:0]=output   GPIO[0]=1  LCD ON  GPIO[0]=1  LCD OFF 
    175   writedata(0x01);    //GPIO0 normal
    176 
    177   writecommand(0xBA);
    178   writedata(0x01);    //GPIO[0] out 1 --- LCD display on/off control PIN
    179 
    180   writecommand(0x2A); 
    181   writedata(0);
    182   writedata(0);
    183   writedata((479 & 0xFF00)>>8);
    184   writedata(479 & 0xFF);
    185 
    186   writecommand(0x2B); 
    187   writedata(0);
    188   writedata(0);
    189   writedata((799 & 0xFF00)>>8);
    190   writedata(799 & 0xFF);
    191 
    192   writecommand(0x2C);
    193 
    194   writecommand(0x29);   //display on
    195 
    196   writecommand(0xBE);   //set PWM for B/L
    197   writedata(0x06);
    198   writedata(0xf0);
    199   writedata(0x01);
    200   writedata(0xf0);
    201   writedata(0x00);
    202   writedata(0x00);
    203 
    204   writecommand(0xd0); 
    205   writedata(0x0d);  
    206 
    207   writecommand(0x2C); 
    208 
    209 #elif defined (SSD1963_800ALT_DRIVER)
    210 
    211   writecommand(0xE2);   //PLL multiplier, set PLL clock to 120M
    212   writedata(0x23);      //N=0x36 for 6.5M, 0x23 for 10M crystal
    213   writedata(0x02);
    214   writedata(0x04);
    215   writecommand(0xE0);   // PLL enable
    216   writedata(0x01);
    217 
    218   delay(10);
    219 
    220   writecommand(0xE0);
    221   writedata(0x03);
    222 
    223   delay(10);
    224 
    225   writecommand(0x01);   // software reset
    226 
    227   delay(100);
    228 
    229   writecommand(0xE6);   //PLL setting for PCLK, depends on resolution
    230   writedata(0x04);
    231   writedata(0x93);
    232   writedata(0xE0);
    233 
    234   writecommand(0xB0);   //LCD SPECIFICATION
    235   writedata(0x00);  // 0x24
    236   writedata(0x00);
    237   writedata(0x03);    //Set HDP 799
    238   writedata(0x1F);
    239   writedata(0x01);    //Set VDP 479
    240   writedata(0xDF);
    241   writedata(0x00);
    242 
    243   writecommand(0xB4);   //HSYNC
    244   writedata(0x03);    //Set HT  928
    245   writedata(0xA0);
    246   writedata(0x00);    //Set HPS 46
    247   writedata(0x2E);
    248   writedata(0x30);    //Set HPW 48
    249   writedata(0x00);    //Set LPS 15
    250   writedata(0x0F);
    251   writedata(0x00);
    252 
    253   writecommand(0xB6);   //VSYNC
    254   writedata(0x02);    //Set VT  525
    255   writedata(0x0D);
    256   writedata(0x00);    //Set VPS 16
    257   writedata(0x10);
    258   writedata(0x10);    //Set VPW 16
    259   writedata(0x00);    //Set FPS 8
    260   writedata(0x08);
    261 
    262   writecommand(0xBA);
    263   writedata(0x05);    //GPIO[3:0] out 1
    264 
    265   writecommand(0xB8);
    266   writedata(0x07);      //GPIO3=input, GPIO[2:0]=output
    267   writedata(0x01);    //GPIO0 normal
    268 
    269   writecommand(0x36);   //rotation
    270   writedata(0x21 | TFT_MAD_COLOR_ORDER);    // -- Set rotation
    271 
    272   writecommand(0xF0);   //pixel data interface
    273   writedata(0x00);      //8 bit bus
    274 
    275   delay(10);
    276 
    277   writecommand(0x2A); 
    278   writedata(0);
    279   writedata(0);
    280   writedata((479 & 0xFF00)>>8);
    281   writedata(479 & 0xFF);
    282 
    283   writecommand(0x2B); 
    284   writedata(0);
    285   writedata(0);
    286   writedata((799 & 0xFF00)>>8);
    287   writedata(799 & 0xFF);
    288 
    289   writecommand(0x2C);
    290 
    291   writecommand(0x29);   //display on
    292 
    293   writecommand(0xBE);   //set PWM for B/L
    294   writedata(0x06);
    295   writedata(0xF0);
    296   writedata(0x01);
    297   writedata(0xF0);
    298   writedata(0x00);
    299   writedata(0x00);
    300 
    301   writecommand(0xD0); 
    302   writedata(0x0D);  
    303 
    304   writecommand(0x2C); 
    305 
    306 #elif defined (SSD1963_800BD_DRIVER) // Copied from Buy Display code
    307 
    308   writecommand(0xE2);   //PLL multiplier, set PLL clock to 120M
    309   writedata(0x23);      //N=0x36 for 6.5M, 0x23 for 10M crystal
    310   writedata(0x02);
    311   writedata(0x54);
    312 
    313   writecommand(0xE0);   // PLL enable
    314   writedata(0x01);
    315 
    316   delay(10);
    317 
    318   writecommand(0xE0);
    319   writedata(0x03);
    320 
    321   delay(10);
    322 
    323   writecommand(0x01);   // software reset
    324 
    325   delay(100);
    326 
    327   writecommand(0xE6);   //PLL setting for PCLK, depends on resolution
    328   writedata(0x03);
    329   writedata(0x33);
    330   writedata(0x33);
    331 
    332   writecommand(0xB0);    //LCD SPECIFICATION
    333   writedata(0x20);
    334   writedata(0x00);
    335   writedata(799 >> 8);   //Set HDP 799
    336   writedata(799 & 0xFF);
    337   writedata(479 >> 8);   //Set VDP 479
    338   writedata(479 & 0xFF);
    339   writedata(0x00);
    340 
    341   writecommand(0xB4);   //HSYNC
    342   writedata(0x04);      //Set HT
    343   writedata(0x1F);
    344   writedata(0x00);      //Set HPS
    345   writedata(0xD2);
    346   writedata(0x00);      //Set HPW
    347   writedata(0x00);      //Set LPS
    348   writedata(0x00);
    349   writedata(0x00);
    350 
    351   writecommand(0xB6);   //VSYNC
    352   writedata(0x02);    //Set VT
    353   writedata(0x0C);
    354   writedata(0x00);    //Set VPS
    355   writedata(0x22);
    356   writedata(0x00);    //Set VPW
    357   writedata(0x00);    //Set FPS
    358   writedata(0x00);
    359 
    360   writecommand(0xB8);
    361   writedata(0x0F);      //GPIO3=input, GPIO[2:0]=output
    362   writedata(0x01);      //GPIO0 normal
    363 
    364   writecommand(0xBA);
    365   writedata(0x01);    //GPIO[0] out 1 --- LCD display on/off control PIN
    366 
    367   writecommand(0x36);   //rotation
    368   writedata(0x21 | TFT_MAD_COLOR_ORDER);      //set to rotate
    369 
    370 	//writecommand(0x003A); //Set the current pixel format for RGB image data
    371 	//writedata(0x0050);    //16-bit/pixel
    372 
    373   writecommand(0xF0);   //pixel data interface
    374   writedata(0x00);      //000 = 8 bit bus, 011 = 16 bit, 110 = 9 bit
    375 
    376   writecommand(0xBC);
    377   writedata(0x40);     //contrast value
    378   writedata(0x80);     //brightness value
    379   writedata(0x40);     //saturation value
    380   writedata(0x01);     //Post Processor Enable
    381 
    382 
    383   delay(10);
    384 
    385   writecommand(0x29);   //display on
    386 
    387   writecommand(0xBE);   //set PWM for B/L
    388   writedata(0x06);
    389   writedata(0x80);
    390   writedata(0x01);
    391   writedata(0xF0);
    392   writedata(0x00);
    393   writedata(0x00);
    394 
    395   writecommand(0xD0); 
    396   writedata(0x0D);  
    397 
    398 #endif