acid-drop- Hacking the planet from a LilyGo T-Deck using custom firmware |
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RM68120_Init.h (7556B)
1 // Initialisation for RM68120 2 3 //ENABLE PAGE 1 4 writeRegister8(0xF000, 0x55); 5 writeRegister8(0xF001, 0xAA); 6 writeRegister8(0xF002, 0x52); 7 writeRegister8(0xF003, 0x08); 8 writeRegister8(0xF004, 0x01); 9 10 //GAMMA SETING RED 11 writeRegister8(0xD400, 0x00); 12 writeRegister8(0xD401, 0x00); 13 writeRegister8(0xD402, 0x1b); 14 writeRegister8(0xD403, 0x44); 15 writeRegister8(0xD404, 0x62); 16 writeRegister8(0xD405, 0x00); 17 writeRegister8(0xD406, 0x7b); 18 writeRegister8(0xD407, 0xa1); 19 writeRegister8(0xD408, 0xc0); 20 writeRegister8(0xD409, 0xee); 21 writeRegister8(0xD40A, 0x55); 22 writeRegister8(0xD40B, 0x10); 23 writeRegister8(0xD40C, 0x2c); 24 writeRegister8(0xD40D, 0x43); 25 writeRegister8(0xD40E, 0x57); 26 writeRegister8(0xD40F, 0x55); 27 writeRegister8(0xD410, 0x68); 28 writeRegister8(0xD411, 0x78); 29 writeRegister8(0xD412, 0x87); 30 writeRegister8(0xD413, 0x94); 31 writeRegister8(0xD414, 0x55); 32 writeRegister8(0xD415, 0xa0); 33 writeRegister8(0xD416, 0xac); 34 writeRegister8(0xD417, 0xb6); 35 writeRegister8(0xD418, 0xc1); 36 writeRegister8(0xD419, 0x55); 37 writeRegister8(0xD41A, 0xcb); 38 writeRegister8(0xD41B, 0xcd); 39 writeRegister8(0xD41C, 0xd6); 40 writeRegister8(0xD41D, 0xdf); 41 writeRegister8(0xD41E, 0x95); 42 writeRegister8(0xD41F, 0xe8); 43 writeRegister8(0xD420, 0xf1); 44 writeRegister8(0xD421, 0xfa); 45 writeRegister8(0xD422, 0x02); 46 writeRegister8(0xD423, 0xaa); 47 writeRegister8(0xD424, 0x0b); 48 writeRegister8(0xD425, 0x13); 49 writeRegister8(0xD426, 0x1d); 50 writeRegister8(0xD427, 0x26); 51 writeRegister8(0xD428, 0xaa); 52 writeRegister8(0xD429, 0x30); 53 writeRegister8(0xD42A, 0x3c); 54 writeRegister8(0xD42B, 0x4A); 55 writeRegister8(0xD42C, 0x63); 56 writeRegister8(0xD42D, 0xea); 57 writeRegister8(0xD42E, 0x79); 58 writeRegister8(0xD42F, 0xa6); 59 writeRegister8(0xD430, 0xd0); 60 writeRegister8(0xD431, 0x20); 61 writeRegister8(0xD432, 0x0f); 62 writeRegister8(0xD433, 0x8e); 63 writeRegister8(0xD434, 0xff); 64 65 //GAMMA SETING GREEN 66 writeRegister8(0xD500, 0x00); 67 writeRegister8(0xD501, 0x00); 68 writeRegister8(0xD502, 0x1b); 69 writeRegister8(0xD503, 0x44); 70 writeRegister8(0xD504, 0x62); 71 writeRegister8(0xD505, 0x00); 72 writeRegister8(0xD506, 0x7b); 73 writeRegister8(0xD507, 0xa1); 74 writeRegister8(0xD508, 0xc0); 75 writeRegister8(0xD509, 0xee); 76 writeRegister8(0xD50A, 0x55); 77 writeRegister8(0xD50B, 0x10); 78 writeRegister8(0xD50C, 0x2c); 79 writeRegister8(0xD50D, 0x43); 80 writeRegister8(0xD50E, 0x57); 81 writeRegister8(0xD50F, 0x55); 82 writeRegister8(0xD510, 0x68); 83 writeRegister8(0xD511, 0x78); 84 writeRegister8(0xD512, 0x87); 85 writeRegister8(0xD513, 0x94); 86 writeRegister8(0xD514, 0x55); 87 writeRegister8(0xD515, 0xa0); 88 writeRegister8(0xD516, 0xac); 89 writeRegister8(0xD517, 0xb6); 90 writeRegister8(0xD518, 0xc1); 91 writeRegister8(0xD519, 0x55); 92 writeRegister8(0xD51A, 0xcb); 93 writeRegister8(0xD51B, 0xcd); 94 writeRegister8(0xD51C, 0xd6); 95 writeRegister8(0xD51D, 0xdf); 96 writeRegister8(0xD51E, 0x95); 97 writeRegister8(0xD51F, 0xe8); 98 writeRegister8(0xD520, 0xf1); 99 writeRegister8(0xD521, 0xfa); 100 writeRegister8(0xD522, 0x02); 101 writeRegister8(0xD523, 0xaa); 102 writeRegister8(0xD524, 0x0b); 103 writeRegister8(0xD525, 0x13); 104 writeRegister8(0xD526, 0x1d); 105 writeRegister8(0xD527, 0x26); 106 writeRegister8(0xD528, 0xaa); 107 writeRegister8(0xD529, 0x30); 108 writeRegister8(0xD52A, 0x3c); 109 writeRegister8(0xD52B, 0x4a); 110 writeRegister8(0xD52C, 0x63); 111 writeRegister8(0xD52D, 0xea); 112 writeRegister8(0xD52E, 0x79); 113 writeRegister8(0xD52F, 0xa6); 114 writeRegister8(0xD530, 0xd0); 115 writeRegister8(0xD531, 0x20); 116 writeRegister8(0xD532, 0x0f); 117 writeRegister8(0xD533, 0x8e); 118 writeRegister8(0xD534, 0xff); 119 120 //GAMMA SETING BLUE 121 writeRegister8(0xD600, 0x00); 122 writeRegister8(0xD601, 0x00); 123 writeRegister8(0xD602, 0x1b); 124 writeRegister8(0xD603, 0x44); 125 writeRegister8(0xD604, 0x62); 126 writeRegister8(0xD605, 0x00); 127 writeRegister8(0xD606, 0x7b); 128 writeRegister8(0xD607, 0xa1); 129 writeRegister8(0xD608, 0xc0); 130 writeRegister8(0xD609, 0xee); 131 writeRegister8(0xD60A, 0x55); 132 writeRegister8(0xD60B, 0x10); 133 writeRegister8(0xD60C, 0x2c); 134 writeRegister8(0xD60D, 0x43); 135 writeRegister8(0xD60E, 0x57); 136 writeRegister8(0xD60F, 0x55); 137 writeRegister8(0xD610, 0x68); 138 writeRegister8(0xD611, 0x78); 139 writeRegister8(0xD612, 0x87); 140 writeRegister8(0xD613, 0x94); 141 writeRegister8(0xD614, 0x55); 142 writeRegister8(0xD615, 0xa0); 143 writeRegister8(0xD616, 0xac); 144 writeRegister8(0xD617, 0xb6); 145 writeRegister8(0xD618, 0xc1); 146 writeRegister8(0xD619, 0x55); 147 writeRegister8(0xD61A, 0xcb); 148 writeRegister8(0xD61B, 0xcd); 149 writeRegister8(0xD61C, 0xd6); 150 writeRegister8(0xD61D, 0xdf); 151 writeRegister8(0xD61E, 0x95); 152 writeRegister8(0xD61F, 0xe8); 153 writeRegister8(0xD620, 0xf1); 154 writeRegister8(0xD621, 0xfa); 155 writeRegister8(0xD622, 0x02); 156 writeRegister8(0xD623, 0xaa); 157 writeRegister8(0xD624, 0x0b); 158 writeRegister8(0xD625, 0x13); 159 writeRegister8(0xD626, 0x1d); 160 writeRegister8(0xD627, 0x26); 161 writeRegister8(0xD628, 0xaa); 162 writeRegister8(0xD629, 0x30); 163 writeRegister8(0xD62A, 0x3c); 164 writeRegister8(0xD62B, 0x4A); 165 writeRegister8(0xD62C, 0x63); 166 writeRegister8(0xD62D, 0xea); 167 writeRegister8(0xD62E, 0x79); 168 writeRegister8(0xD62F, 0xa6); 169 writeRegister8(0xD630, 0xd0); 170 writeRegister8(0xD631, 0x20); 171 writeRegister8(0xD632, 0x0f); 172 writeRegister8(0xD633, 0x8e); 173 writeRegister8(0xD634, 0xff); 174 175 //AVDD VOLTAGE SETTING 176 writeRegister8(0xB000, 0x05); 177 writeRegister8(0xB001, 0x05); 178 writeRegister8(0xB002, 0x05); 179 //AVEE VOLTAGE SETTING 180 writeRegister8(0xB100, 0x05); 181 writeRegister8(0xB101, 0x05); 182 writeRegister8(0xB102, 0x05); 183 184 //AVDD Boosting 185 writeRegister8(0xB600, 0x34); 186 writeRegister8(0xB601, 0x34); 187 writeRegister8(0xB603, 0x34); 188 //AVEE Boosting 189 writeRegister8(0xB700, 0x24); 190 writeRegister8(0xB701, 0x24); 191 writeRegister8(0xB702, 0x24); 192 //VCL Boosting 193 writeRegister8(0xB800, 0x24); 194 writeRegister8(0xB801, 0x24); 195 writeRegister8(0xB802, 0x24); 196 //VGLX VOLTAGE SETTING 197 writeRegister8(0xBA00, 0x14); 198 writeRegister8(0xBA01, 0x14); 199 writeRegister8(0xBA02, 0x14); 200 //VCL Boosting 201 writeRegister8(0xB900, 0x24); 202 writeRegister8(0xB901, 0x24); 203 writeRegister8(0xB902, 0x24); 204 //Gamma Voltage 205 writeRegister8(0xBc00, 0x00); 206 writeRegister8(0xBc01, 0xa0);//vgmp=5.0 207 writeRegister8(0xBc02, 0x00); 208 writeRegister8(0xBd00, 0x00); 209 writeRegister8(0xBd01, 0xa0);//vgmn=5.0 210 writeRegister8(0xBd02, 0x00); 211 //VCOM Setting 212 writeRegister8(0xBe01, 0x3d);//3 213 214 //ENABLE PAGE 0 215 writeRegister8(0xF000, 0x55); 216 writeRegister8(0xF001, 0xAA); 217 writeRegister8(0xF002, 0x52); 218 writeRegister8(0xF003, 0x08); 219 writeRegister8(0xF004, 0x00); 220 //Vivid Color Function Control 221 writeRegister8(0xB400, 0x10); 222 //Z-INVERSION 223 writeRegister8(0xBC00, 0x05); 224 writeRegister8(0xBC01, 0x05); 225 writeRegister8(0xBC02, 0x05); 226 //*************** add on 20111021**********************// 227 writeRegister8(0xB700, 0x22);//GATE EQ CONTROL 228 writeRegister8(0xB701, 0x22);//GATE EQ CONTROL 229 writeRegister8(0xC80B, 0x2A);//DISPLAY TIMING CONTROL 230 writeRegister8(0xC80C, 0x2A);//DISPLAY TIMING CONTROL 231 writeRegister8(0xC80F, 0x2A);//DISPLAY TIMING CONTROL 232 writeRegister8(0xC810, 0x2A);//DISPLAY TIMING CONTROL 233 //*************** add on 20111021**********************// 234 //PWM_ENH_OE =1 235 writeRegister8(0xd000, 0x01); 236 //DM_SEL =1 237 writeRegister8(0xb300, 0x10); 238 //VBPDA=07h 239 writeRegister8(0xBd02, 0x07); 240 //VBPDb=07h 241 writeRegister8(0xBe02, 0x07); 242 //VBPDc=07h 243 writeRegister8(0xBf02, 0x07); 244 245 //ENABLE PAGE 2 246 writeRegister8(0xF000, 0x55); 247 writeRegister8(0xF001, 0xAA); 248 writeRegister8(0xF002, 0x52); 249 writeRegister8(0xF003, 0x08); 250 writeRegister8(0xF004, 0x02); 251 //SDREG0 =0 252 writeRegister8(0xc301, 0xa9); 253 //DS=14 254 writeRegister8(0xfe01, 0x94); 255 //OSC =60h 256 writeRegister8(0xf600, 0x60); 257 //TE ON 258 writeRegister8(0x3500, 0x00); 259 writeRegister8(0xFFFF, 0xFF); 260 261 //SLEEP OUT 262 writecommand(0x1100); 263 delay(100); 264 //DISPLY ON 265 writecommand(0x2900); 266 delay(100); 267 268 writeRegister16(0x3A00, 0x55); 269 writeRegister8(0x3600, TFT_MAD_COLOR_ORDER);