acid-drop

- Hacking the planet from a LilyGo T-Deck using custom firmware
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Arduino_R61529.h (10759B)

      1 /*
      2  * start rewrite from:
      3  * https://github.com/adafruit/Adafruit-GFX-Library.git
      4  * https://github.com/daumemo/IPS_LCD_R61529_FT6236_Arduino_eSPI_Test
      5  * Data Sheet:
      6  * http://read.pudn.com/downloads648/ebook/2620902/R61529.pdf
      7  */
      8 #ifndef _ARDUINO_R61529_H_
      9 #define _ARDUINO_R61529_H_
     10 
     11 #include <Arduino.h>
     12 #include <Print.h>
     13 #include "../Arduino_GFX.h"
     14 #include "../Arduino_TFT.h"
     15 
     16 #define R61529_TFTWIDTH 320  // R61529 max width
     17 #define R61529_TFTHEIGHT 480 // R61529 max height
     18 
     19 #define R61529_RST_DELAY 20     // delay ms wait for reset finish
     20 #define R61529_SLPIN_DELAY 20   // delay ms wait for sleep in finish
     21 #define R61529_SLPOUT_DELAY 200 // delay ms wait for sleep out finish
     22 
     23 // User Command
     24 #define R61529_NOP 0x00        // nop
     25 #define R61529_SWRESET 0x01    // soft_reset
     26 #define R61529_RDDID 0x04      // read_DDB_start
     27 #define R61529_RDMODE 0x0A     // get_power_mode
     28 #define R61529_RDMADCTL 0x0B   // get_address_mode
     29 #define R61529_RDPIXFMT 0x0C   // get_pixel_format
     30 #define R61529_RDIMGFMT 0x0D   // get_display_mode
     31 #define R61529_RDSIGMODE 0x0E  // get_signal_mode
     32 #define R61529_RDSELFDIAG 0x0F // get_diagnostic_result
     33 
     34 #define R61529_SLPIN 0x10  // enter_sleep_mode
     35 #define R61529_SLPOUT 0x11 // exit_sleep_mode
     36 #define R61529_PTLON 0x12  // enter_partial_mode
     37 #define R61529_NORON 0x13  // enter_normal_mode
     38 
     39 #define R61529_INVOFF 0x20  // exit_invert_mode
     40 #define R61529_INVON 0x21   // enter_invert_mode
     41 #define R61529_DISPOFF 0x28 // set_display_off
     42 #define R61529_DISPON 0x29  // set_display_on
     43 #define R61529_CASET 0x2A   // set_column_address
     44 #define R61529_PASET 0x2B   // set_page_address
     45 #define R61529_RAMWR 0x2C   // write_memory_start
     46 #define R61529_RAMRD 0x2E   // read_memory_start
     47 
     48 #define R61529_PTLAR 0x30   // set_partial_area
     49 #define R61529_TEAROFF 0x34 // set_tear_off
     50 #define R61529_TEARON 0x35  // set_tear_on
     51 #define R61529_MADCTL 0x36  // set_address_mode
     52 #define R61529_IDLEOFF 0x38 // exit_idle_mode
     53 #define R61529_IDLEON 0x39  // enter_idle_mode
     54 
     55 #define R61529_PIXFMT 0x3A // set_pixel_format
     56 #define R61529_WRMC 0x3C   // write_memory_continue
     57 #define R61529_RDMC 0x3E   // read_memory_continue
     58 
     59 #define R61529_SETTSL 0x44 // set_tear_scanline
     60 #define R61529_GETSL 0x45  // get_scanline
     61 
     62 #define R61529_RDDDBS 0xA1 // read_DDB_start
     63 
     64 #define R61529_MCAP 0xB0     // Manufacturer Command Access Protect
     65 #define R61529_LPMC 0xB1     // Low Power Mode Control
     66 #define R61529_FMAIS 0xB3    // Frame Memory Access and Interface Setting
     67 #define R61529_DISPMODE 0xB4 // Display Mode
     68 #define R61529_RCEEC 0xB5    // Read Checksum and ECC Error Count
     69 #define R61529_DSICTL 0xB6   // DSI Control
     70 #define R61529_MDDICTL 0xB7  // MDDI Control
     71 #define R61529_BLCTL1 0xB8   // Backlight Control (1)
     72 #define R61529_BLCTL2 0xB9   // Backlight Control (2)
     73 #define R61529_BLCTL3 0xBA   // Backlight Control (3)
     74 #define R61529_DCRD 0xBF     // Device Code Read
     75 
     76 #define R61529_PDS 0xC0       // Panel Driving Setting
     77 #define R61529_DTSFNM 0xC1    // Display Timing Setting for Normal Mode
     78 #define R61529_TESTMODE1 0xC3 // Test Mode 1
     79 #define R61529_SGDTS 0xC4     // Source/Gate Driving Timing Setting
     80 #define R61529_DPIPCTL 0xC6   // DPI Polarity Control
     81 #define R61529_TESTMODE2 0xC7 // Test Mode 2
     82 #define R61529_GAMMASETA 0xC8 // Gamma Setting A Set
     83 #define R61529_GAMMASETB 0xC9 // Gamma Setting B Set
     84 #define R61529_GAMMASETC 0xCA // Gamma Setting C Set
     85 #define R61529_TESTMODE3 0xCC // Test Mode 3
     86 
     87 #define R61529_PWSET 0xD0     // Power Setting (Charge Pump Setting)
     88 #define R61529_VCOMSET 0xD1   // VCOM Setting
     89 #define R61529_TESTMODE4 0xD6 // Test Mode 4
     90 #define R61529_TESTMODE5 0xD7 // Test Mode 5
     91 #define R61529_TESTMODE6 0xD8 // Test Mode 6
     92 #define R61529_TESTMODE7 0xD9 // Test Mode 7
     93 #define R61529_TESTMODE8 0xDA // Test Mode 8
     94 
     95 #define R61529_NVMAC 0xE0       // NVM Access Control
     96 #define R61529_SETDDBWRCTL 0xE1 // set_DDB_write_control
     97 #define R61529_NVMLC 0xE2       // NVM Load Control
     98 #define R61529_TESTMODE9 0xE4   // Test Mode 9
     99 #define R61529_TESTMODE10 0xE5  // Test Mode 10
    100 #define R61529_TESTMODE11 0xE6  // Test Mode 11
    101 #define R61529_TESTMODE12 0xE7  // Test Mode 12
    102 
    103 #define R61529_TESTMODE13 0xF3 // Test Mode 13
    104 #define R61529_RDMODEIN 0xF5   // Read Mode In for DBI Only
    105 #define R61529_RDMODEOUT 0xF6  // Read Mode Out for DBI Only
    106 #define R61529_TESTMODE14 0xF8 // Test Mode 14
    107 #define R61529_TESTMODE15 0xFA // Test Mode 15
    108 #define R61529_TESTMODE16 0xFC // Test Mode 16
    109 #define R61529_TESTMODE17 0xFD // Test Mode 17
    110 #define R61529_TESTMODE18 0xFE // Test Mode 18
    111 
    112 // parameters
    113 #define R61529_MADCTL_MY 0x80  // Bottom to top
    114 #define R61529_MADCTL_MX 0x40  // Right to left
    115 #define R61529_MADCTL_MV 0x20  // Reverse Mode
    116 #define R61529_MADCTL_ML 0x10  // LCD refresh Bottom to top
    117 #define R61529_MADCTL_RGB 0x00 // Red-Green-Blue pixel order
    118 #define R61529_MADCTL_BGR 0x08 // Blue-Green-Red pixel order
    119 #define R61529_MADCTL_MH 0x04  // LCD refresh right to left
    120 #define R61529_MADCTL_SS 0x02
    121 #define R61529_MADCTL_GS 0x01
    122 
    123 static const uint8_t r61529_init_operations[] = {
    124     BEGIN_WRITE,
    125     WRITE_COMMAND_8, R61529_SLPOUT,
    126     END_WRITE,
    127 
    128     DELAY, R61529_SLPOUT_DELAY,
    129 
    130     BEGIN_WRITE,
    131     WRITE_C8_D8, R61529_MCAP, 0x04,
    132     WRITE_COMMAND_8, R61529_BLCTL1, // lcd pwm
    133     WRITE_BYTES, 20,
    134     0x02, 0x00, 0x00, 0x00,
    135     0x00, 0x00, 0x00, 0x00,
    136     0x00, 0x00, 0x00, 0x00,
    137     0x00, 0x00, 0x00, 0x00,
    138     0x00, 0x00, 0x00, 0x00,
    139 
    140     WRITE_COMMAND_8, R61529_BLCTL2, // lcd pwm
    141     WRITE_BYTES, 4,
    142     0x01, // PWMON = 1;
    143     0x00, // BDCV = 255;
    144     0xff, // pwm freq = 13.7 kHz
    145     0x18, // PWMWM = 1; LEDPWME = 1;
    146 
    147     // additional commands:
    148     WRITE_COMMAND_8, R61529_FMAIS, // Frame Memory Access and Interface Setting
    149     WRITE_BYTES, 5,
    150     0x02, // reset start position of a window area address...
    151     0x00, // TE pin is used. TE signal is output every frame.
    152     0x00, // empty according to the datasheet - does nothing;
    153     0x00, // convert 16/18 bits to 24bits data by writing zeroes to LSBs. Sets image data write/read format(?)
    154     0x00, // ???? (not needed?)
    155     END_WRITE,
    156 
    157     DELAY, 2,
    158 
    159     BEGIN_WRITE,
    160     WRITE_C8_D8, R61529_DISPMODE, 0x00, // Display Mode, Uses internal oscillator
    161 
    162     WRITE_COMMAND_8, R61529_PDS, // Panel Driving Setting;
    163     WRITE_BYTES, 8,
    164     0x03, // Output polarity is inverted. Left/right interchanging scan. Forward scan. BGR mode (depends on other settings). S960 → S1 (depends)
    165     0xDF, // Number of lines for driver to drive - 480.
    166     0x40, // Scan start position - Gate1. (depend on other param);
    167     0x10, // Dot inversion. Dot inversion in not-lit display area. If 0x13 - both will be set to 'column inversion'.
    168     0x00, // settings for non-lit display area...
    169     0x01, // 3 frame scan interval in non-display area...
    170     0x00, // Source output level in retrace period...
    171     0x55, // 54 . Internal clock divider = 5 (low and high periods).
    172 
    173     WRITE_COMMAND_8, R61529_DTSFNM, // Display Timing Setting for Normal Mode
    174     WRITE_BYTES, 5,
    175     0x07, // Clock devider = 12. 14MHz/12. Used by display circuit and step-up circuit.
    176     0x27, // These bits set the number of clocks in 1 line period. 0x27 - 39 clocks.
    177     0x08, // Number of back porch lines. 0x08 - 8 lines.
    178     0x08, // Number of front porch lines. 0x08 - 8lines.
    179     0x00, // Spacial configuriation mode 1 (?). 1 line inversion mode (?).
    180 
    181     WRITE_COMMAND_8, R61529_SGDTS, // Source/Gate Driving Timing Setting
    182     WRITE_BYTES, 4,
    183     0x57, // falling position (stop) of gate driver - 4 clocks... gate start position - 8 clocks...
    184     0x00, // nothing to set up according to the datasheet
    185     0x05, // Source precharge period (GND) - 5 clocks.
    186     0x03, // source precharge period (VCI) - 3 clocks.
    187 
    188     WRITE_C8_D8, R61529_DPIPCTL, 0x04, // DPI polarity control, VSYNC -Active Low. HSYNC - Active Low. DE pin enable data write in when DE=1. Reads data on the rising edge of the PCLK signal.
    189 
    190     //----Gamma setting start-----
    191     WRITE_COMMAND_8, R61529_GAMMASETA,
    192     WRITE_BYTES, 24,
    193     0x03, 0x12, 0x1A, 0x24,
    194     0x32, 0x4B, 0x3B, 0x29,
    195     0x1F, 0x18, 0x12, 0x04,
    196     0x03, 0x12, 0x1A, 0x24,
    197     0x32, 0x4B, 0x3B, 0x29,
    198     0x1F, 0x18, 0x12, 0x04,
    199 
    200     WRITE_COMMAND_8, R61529_GAMMASETB,
    201     WRITE_BYTES, 24,
    202     0x03, 0x12, 0x1A, 0x24,
    203     0x32, 0x4B, 0x3B, 0x29,
    204     0x1F, 0x18, 0x12, 0x04,
    205     0x03, 0x12, 0x1A, 0x24,
    206     0x32, 0x4B, 0x3B, 0x29,
    207     0x1F, 0x18, 0x12, 0x04,
    208 
    209     WRITE_COMMAND_8, R61529_GAMMASETC,
    210     WRITE_BYTES, 24,
    211     0x03, 0x12, 0x1A, 0x24,
    212     0x32, 0x4B, 0x3B, 0x29,
    213     0x1F, 0x18, 0x12, 0x04,
    214     0x03, 0x12, 0x1A, 0x24,
    215     0x32, 0x4B, 0x3B, 0x29,
    216     0x1F, 0x18, 0x12, 0x04,
    217     //---Gamma setting end--------
    218 
    219     // old ones:
    220     WRITE_COMMAND_8, R61529_PWSET,
    221     WRITE_BYTES, 16,
    222     0x99, // DC4~1//A5. Set up clock cycle of the internal step up controller.
    223     0x06, // BT // Set Voltage step up factor.
    224     0x08, // default according to the datasheet - does nothing.
    225     0x20, // VCN step up cycles.
    226     0x29, // VC1, VC2// VCI3 voltage = 2.70V;  VCI2 voltage = 3.8V.
    227     0x04, // default
    228     0x01, // default
    229     0x00, // default
    230     0x08, // default
    231     0x01, // default
    232     0x00, // default
    233     0x06, // default
    234     0x01, // default
    235     0x00, // default
    236     0x00, // default
    237     0x20, // default
    238 
    239     WRITE_COMMAND_8, R61529_VCOMSET, // VCOM setting
    240     WRITE_BYTES, 4,
    241     0x00, // disable write to VDC[7:0]
    242     0x20, // 45 38 VPLVL// voltage of γ correction registers for positive polarity
    243     0x20, // 45 38 VNLVL// voltage of γ correction registers for negative polarity
    244     0x15, // 32 2A VCOMDC// VNLVL x 0.063
    245 
    246     WRITE_COMMAND_8, R61529_NVMAC, // NVM Access Control
    247     WRITE_BYTES, 3,
    248     0x00, // NVM access is disabled
    249     0x00, // Erase operation (disabled).
    250     0x00, // TE pin works as tearing effect pin.
    251           //  should be one more writeData(0x00}, according to the datasheet.
    252 
    253     WRITE_COMMAND_8, R61529_SETDDBWRCTL, // set_DDB_write_control
    254     WRITE_BYTES, 6,
    255     0x00, 0x00, 0x00, 0x00,
    256     0x00, 0x00,
    257 
    258     WRITE_C8_D8, R61529_NVMLC, 0x00, // NVM Load Control, does not execute data load from the NVM to each command
    259 
    260     WRITE_C8_D8, 0x3A, 0x55, // set_pixel_format, 16-Bit/pixel = 55h, 24-bit/pixel = 77h
    261 
    262     WRITE_COMMAND_8, R61529_DISPON,
    263     END_WRITE,
    264 
    265     DELAY, 20};
    266 
    267 class Arduino_R61529 : public Arduino_TFT
    268 {
    269 public:
    270   Arduino_R61529(Arduino_DataBus *bus, int8_t rst = GFX_NOT_DEFINED, uint8_t r = 0, bool ips = false);
    271 
    272   bool begin(int32_t speed = GFX_NOT_DEFINED) override;
    273   void writeAddrWindow(int16_t x, int16_t y, uint16_t w, uint16_t h) override;
    274   void setRotation(uint8_t r) override;
    275   void invertDisplay(bool) override;
    276   void displayOn() override;
    277   void displayOff() override;
    278 
    279 protected:
    280   void tftInit() override;
    281 
    282 private:
    283 };
    284 
    285 #endif