acid-drop- Hacking the planet from a LilyGo T-Deck using custom firmware |
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Arduino_SWPAR16.h (7094B)
1 #ifndef _ARDUINO_SWPAR16_H_ 2 #define _ARDUINO_SWPAR16_H_ 3 4 #include "Arduino_DataBus.h" 5 6 class Arduino_SWPAR16 : public Arduino_DataBus 7 { 8 public: 9 Arduino_SWPAR16( 10 int8_t dc, int8_t cs, int8_t wr, int8_t rd, 11 int8_t d0, int8_t d1, int8_t d2, int8_t d3, int8_t d4, int8_t d5, int8_t d6, int8_t d7, 12 int8_t d8, int8_t d9, int8_t d10, int8_t d11, int8_t d12, int8_t d13, int8_t d14, int8_t d15); // Constructor 13 14 bool begin(int32_t speed = GFX_NOT_DEFINED, int8_t dataMode = GFX_NOT_DEFINED) override; 15 void beginWrite() override; 16 void endWrite() override; 17 void writeCommand(uint8_t) override; 18 void writeCommand16(uint16_t) override; 19 void write(uint8_t) override; 20 void write16(uint16_t) override; 21 void writeRepeat(uint16_t p, uint32_t len) override; 22 void writePixels(uint16_t *data, uint32_t len) override; 23 24 #if !defined(LITTLE_FOOT_PRINT) 25 void writeC8D8(uint8_t c, uint8_t d) override; 26 void writeC8D16(uint8_t c, uint16_t d) override; 27 void writeC8D16D16(uint8_t c, uint16_t d1, uint16_t d2) override; 28 void writeC8D16D16Split(uint8_t c, uint16_t d1, uint16_t d2) override; 29 void writeBytes(uint8_t *data, uint32_t len) override; 30 void writePattern(uint8_t *data, uint8_t len, uint32_t repeat) override; 31 32 void writeIndexedPixels(uint8_t *data, uint16_t *idx, uint32_t len) override; 33 void writeIndexedPixelsDouble(uint8_t *data, uint16_t *idx, uint32_t len) override; 34 #endif // !defined(LITTLE_FOOT_PRINT) 35 36 protected: 37 private: 38 INLINE void WRITE(uint8_t d); 39 INLINE void WRITE16(uint16_t d); 40 INLINE void WRITEREPEAT(uint16_t p, uint32_t len); 41 INLINE void DC_HIGH(void); 42 INLINE void DC_LOW(void); 43 INLINE void CS_HIGH(void); 44 INLINE void CS_LOW(void); 45 INLINE void WR_HIGH(void); 46 INLINE void WR_LOW(void); 47 INLINE void RD_HIGH(void); 48 INLINE void RD_LOW(void); 49 INLINE void D0_HIGH(void); 50 INLINE void D0_LOW(void); 51 INLINE void D1_HIGH(void); 52 INLINE void D1_LOW(void); 53 INLINE void D2_HIGH(void); 54 INLINE void D2_LOW(void); 55 INLINE void D3_HIGH(void); 56 INLINE void D3_LOW(void); 57 INLINE void D4_HIGH(void); 58 INLINE void D4_LOW(void); 59 INLINE void D5_HIGH(void); 60 INLINE void D5_LOW(void); 61 INLINE void D6_HIGH(void); 62 INLINE void D6_LOW(void); 63 INLINE void D7_HIGH(void); 64 INLINE void D7_LOW(void); 65 INLINE void D8_HIGH(void); 66 INLINE void D8_LOW(void); 67 INLINE void D9_HIGH(void); 68 INLINE void D9_LOW(void); 69 INLINE void D10_HIGH(void); 70 INLINE void D10_LOW(void); 71 INLINE void D11_HIGH(void); 72 INLINE void D11_LOW(void); 73 INLINE void D12_HIGH(void); 74 INLINE void D12_LOW(void); 75 INLINE void D13_HIGH(void); 76 INLINE void D13_LOW(void); 77 INLINE void D14_HIGH(void); 78 INLINE void D14_LOW(void); 79 INLINE void D15_HIGH(void); 80 INLINE void D15_LOW(void); 81 82 int8_t _dc, _cs, _wr, _rd; 83 int8_t _d0, _d1, _d2, _d3, _d4, _d5, _d6, _d7; 84 int8_t _d8, _d9, _d10, _d11, _d12, _d13, _d14, _d15; 85 86 // CLASS INSTANCE VARIABLES -------------------------------------------- 87 88 // Here be dragons! There's a big union of three structures here -- 89 // one each for hardware SPI, software (bitbang) SPI, and parallel 90 // interfaces. This is to save some memory, since a display's connection 91 // will be only one of these. The order of some things is a little weird 92 // in an attempt to get values to align and pack better in RAM. 93 94 #if defined(USE_FAST_PINIO) 95 #if defined(HAS_PORT_SET_CLR) 96 PORTreg_t _dcPortSet; 97 PORTreg_t _dcPortClr; 98 PORTreg_t _csPortSet; 99 PORTreg_t _csPortClr; 100 PORTreg_t _wrPortSet; 101 PORTreg_t _wrPortClr; 102 PORTreg_t _rdPortSet; 103 PORTreg_t _rdPortClr; 104 PORTreg_t _d0PortSet; 105 PORTreg_t _d0PortClr; 106 PORTreg_t _d1PortSet; 107 PORTreg_t _d1PortClr; 108 PORTreg_t _d2PortSet; 109 PORTreg_t _d2PortClr; 110 PORTreg_t _d3PortSet; 111 PORTreg_t _d3PortClr; 112 PORTreg_t _d4PortSet; 113 PORTreg_t _d4PortClr; 114 PORTreg_t _d5PortSet; 115 PORTreg_t _d5PortClr; 116 PORTreg_t _d6PortSet; 117 PORTreg_t _d6PortClr; 118 PORTreg_t _d7PortSet; 119 PORTreg_t _d7PortClr; 120 PORTreg_t _d8PortSet; 121 PORTreg_t _d8PortClr; 122 PORTreg_t _d9PortSet; 123 PORTreg_t _d9PortClr; 124 PORTreg_t _d10PortSet; 125 PORTreg_t _d10PortClr; 126 PORTreg_t _d11PortSet; 127 PORTreg_t _d11PortClr; 128 PORTreg_t _d12PortSet; 129 PORTreg_t _d12PortClr; 130 PORTreg_t _d13PortSet; 131 PORTreg_t _d13PortClr; 132 PORTreg_t _d14PortSet; 133 PORTreg_t _d14PortClr; 134 PORTreg_t _d15PortSet; 135 PORTreg_t _d15PortClr; 136 #if !defined(KINETISK) 137 ARDUINOGFX_PORT_t _dcPinMask; 138 ARDUINOGFX_PORT_t _csPinMask; 139 ARDUINOGFX_PORT_t _wrPinMask; 140 ARDUINOGFX_PORT_t _rdPinMask; 141 ARDUINOGFX_PORT_t _d0PinMask; 142 ARDUINOGFX_PORT_t _d1PinMask; 143 ARDUINOGFX_PORT_t _d2PinMask; 144 ARDUINOGFX_PORT_t _d3PinMask; 145 ARDUINOGFX_PORT_t _d4PinMask; 146 ARDUINOGFX_PORT_t _d5PinMask; 147 ARDUINOGFX_PORT_t _d6PinMask; 148 ARDUINOGFX_PORT_t _d7PinMask; 149 ARDUINOGFX_PORT_t _d8PinMask; 150 ARDUINOGFX_PORT_t _d9PinMask; 151 ARDUINOGFX_PORT_t _d10PinMask; 152 ARDUINOGFX_PORT_t _d11PinMask; 153 ARDUINOGFX_PORT_t _d12PinMask; 154 ARDUINOGFX_PORT_t _d13PinMask; 155 ARDUINOGFX_PORT_t _d14PinMask; 156 ARDUINOGFX_PORT_t _d15PinMask; 157 #endif // !KINETISK 158 #else // !HAS_PORT_SET_CLR 159 PORTreg_t _dcPort; 160 PORTreg_t _csPort; 161 PORTreg_t _wrPort; 162 PORTreg_t _rdPort; 163 PORTreg_t _d0Port; 164 PORTreg_t _d1Port; 165 PORTreg_t _d2Port; 166 PORTreg_t _d3Port; 167 PORTreg_t _d4Port; 168 PORTreg_t _d5Port; 169 PORTreg_t _d6Port; 170 PORTreg_t _d7Port; 171 PORTreg_t _d8Port; 172 PORTreg_t _d9Port; 173 PORTreg_t _d10Port; 174 PORTreg_t _d11Port; 175 PORTreg_t _d12Port; 176 PORTreg_t _d13Port; 177 PORTreg_t _d14Port; 178 PORTreg_t _d15Port; 179 ARDUINOGFX_PORT_t _dcPinMaskSet; 180 ARDUINOGFX_PORT_t _dcPinMaskClr; 181 ARDUINOGFX_PORT_t _csPinMaskSet; 182 ARDUINOGFX_PORT_t _csPinMaskClr; 183 ARDUINOGFX_PORT_t _wrPinMaskSet; 184 ARDUINOGFX_PORT_t _wrPinMaskClr; 185 ARDUINOGFX_PORT_t _rdPinMaskSet; 186 ARDUINOGFX_PORT_t _rdPinMaskClr; 187 ARDUINOGFX_PORT_t _d0PinMaskSet; 188 ARDUINOGFX_PORT_t _d0PinMaskClr; 189 ARDUINOGFX_PORT_t _d1PinMaskSet; 190 ARDUINOGFX_PORT_t _d1PinMaskClr; 191 ARDUINOGFX_PORT_t _d2PinMaskSet; 192 ARDUINOGFX_PORT_t _d2PinMaskClr; 193 ARDUINOGFX_PORT_t _d3PinMaskSet; 194 ARDUINOGFX_PORT_t _d3PinMaskClr; 195 ARDUINOGFX_PORT_t _d4PinMaskSet; 196 ARDUINOGFX_PORT_t _d4PinMaskClr; 197 ARDUINOGFX_PORT_t _d5PinMaskSet; 198 ARDUINOGFX_PORT_t _d5PinMaskClr; 199 ARDUINOGFX_PORT_t _d6PinMaskSet; 200 ARDUINOGFX_PORT_t _d6PinMaskClr; 201 ARDUINOGFX_PORT_t _d7PinMaskSet; 202 ARDUINOGFX_PORT_t _d7PinMaskClr; 203 ARDUINOGFX_PORT_t _d8PinMaskSet; 204 ARDUINOGFX_PORT_t _d8PinMaskClr; 205 ARDUINOGFX_PORT_t _d9PinMaskSet; 206 ARDUINOGFX_PORT_t _d9PinMaskClr; 207 ARDUINOGFX_PORT_t _d10PinMaskSet; 208 ARDUINOGFX_PORT_t _d10PinMaskClr; 209 ARDUINOGFX_PORT_t _d11PinMaskSet; 210 ARDUINOGFX_PORT_t _d11PinMaskClr; 211 ARDUINOGFX_PORT_t _d12PinMaskSet; 212 ARDUINOGFX_PORT_t _d12PinMaskClr; 213 ARDUINOGFX_PORT_t _d13PinMaskSet; 214 ARDUINOGFX_PORT_t _d13PinMaskClr; 215 ARDUINOGFX_PORT_t _d14PinMaskSet; 216 ARDUINOGFX_PORT_t _d14PinMaskClr; 217 ARDUINOGFX_PORT_t _d15PinMaskSet; 218 ARDUINOGFX_PORT_t _d15PinMaskClr; 219 #endif // HAS_PORT_SET_CLR 220 #endif // defined(USE_FAST_PINIO) 221 }; 222 223 #endif // _ARDUINO_SWPAR16_H_